More than 100 billion devices are expected to be interconnected around the world by 2020, but high power consumption will limit the performance of more than half of them. Huawei Storage focuses on constructing super-large cloud storage resource pools for enterprise data centers. With the advent of the cloud computing and big data era, enterprises handle increasingly large data volumes. Enterprise customers attach equal importance to OPEX and O&M efficiency in addition to performance, hoping to increase profits by using IT storage systems with higher concurrent data access but lower power consumption.
Based on R&D on DC infrastructure specific to customers’ demands, Huawei launched its first distributed cloud storage powered by its HiSilicon chips – FusionStorage. HiSilicon chips enable FusionStorage to achieve the often mutually exclusive features of high concurrency and low power consumption. The integration helps respond to burst service usage, complex types of services, and various I/O performance models in storage pools requiring smooth access by many users. In addition, it reduces power consumption of devices.
This document describes how FusionStorage leverages advantages of HiSilicon chips in hardware and architecture to implement high concurrency and low power consumption.
32-core chips with low power consumption and high concurrency
In terms of hardware design, FusionStorage is equipped with two HiSilicon 32-core chips with a dominant frequency of 2.4 GHz. Each chip supports eight DDR4 Dual Inline Memory Modules (DIMMs). Unlike traditional chips, HiSilicon chips optimize instruction sets according to storage service models and customer application scenarios, reducing logical resource overheads and power consumption.
What is the relationship between reducing logical resource overheads and reducing power consumption? Consider this. How could we order someone to drink water? We could directly tell them to, or be more specific and order them to take the cup, tip it sideways into their mouth, and then drink the water. The former is easier; however, to effectively execute a command requires capacity for logical thinking, and divides procedures into steps. This is analogous to chips. It seems to be efficient to just run commands on chips. However, these chips require more complex logical units to achieve advanced logic processing and distribute these logical units to run each command step separately, consuming more power through the process. An optimized design architecture of chips is the key to reducing power consumption. According to customers’ service scenarios and storage service models, FusionStorage identifies and breaks down the advanced and complex data I/O processes inside chips, and obtains the minimum command sets necessary for the processes. Then, FusionStorage performs detailed analyses of each procedure on the storage layer, which allows the storage layer to directly invoke the minimum command sets, and reduces procedure divisions on the chip layer. Finally, FusionStorage matches the minimum command sets to logical units inside chips, and deletes unnecessary logical units. The improvement in the architecture enables FusionStorage to save logical resources inside chips, and reduces power consumption. In-depth optimization of FusionStorage is an ideal application for HiSilicon chips, fully using their advantages in architecture, and further improves concurrent processing capability.
The following figures compare the performance and power consumption of FusionStorage equipped with HiSilicon chips to other storage products equipped with general chips.
Performance comparison between Hi1616 and general chips
Power consumption comparison between Hi1616 and general 2630 chips
The comparison shows:
- In typical service scenarios, the performance of FusionStorage with HiSilicon chips is a bit higher than that of other storage products with general chips.
- With the same performance, FusionStorage reduces power consumption by more than 20% and improves the energy efficiency ratio by 20%.
The following table further explains the significance of the 20% reduction in power consumption. Example: Build a data center of 20 PB storage capacity by using storage devices with traditional chips (typical power consumption: 366 W, storage capacity: 64 TB).
Key Factor | Reference Value | Cost Calculation |
Data center capacity | 20 PB | / |
Storage device quantity | 320 (single-device capacity: 64 TB) | / |
Typical power consumption | 0.366 kW | Power consumption in an hour: 117.12 kWh |
Running duration within lifecycle | 7 x 24 x 365 = 61320 hours | Total power consumption: 7,181,798 kWh |
Electricity price | 1 RMB/kWh (typical) | Electricity cost: 7.18 million RMB |
PUE | 2 (typical) | Cost: 14.36 million RMB |
Cost reduction rate | 20% | Saved cost: 2.87 million RMB |
These brief calculations show that using FusionStorage saves customers around 3 million RMB in electricity costs every year, making it an optimal choice.
Conclusion
Core technological innovation on chips has become the driving force for enterprises in all sectors, whether in cutting-edge fields such as artificial intelligence (AI), big data, autonomous driving, and blockchain, or in conventional industries such as healthcare, manufacturing, and finance. Through command set optimization and customized scenario-specific optimization, FusionStorage works with HiSilicon chips to lower TCO throughout the system lifecycle by reducing power consumption by 20% while maintaining high concurrency. Huawei is dedicated to bridging the technical gap caused by unbalanced development in CPU, medium, and network technology by striving for technical innovation and vertical integration of software, hardware, and chips. Huawei aims to provide more efficient and cost-effective products and solutions with higher performance, pursuing commercial success together with customers.
The post FusionStorage Is Powered by HiSilicon Chips to Achieve Low Power Consumption and High Concurrency appeared first on Huawei Enterprise Blog.
Source: Huawei Enterprise Blog
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